1. Technical Field
The technical field relates generally to serial data transfer protocols, and more particularly to a device and method for detecting whether a connected device is using an inter-integrated circuit (I2C) interface protocol or a serial general purpose input/output (SGPIO) interface protocol.
2. Related Art
As a consequence of the miniaturization of integrated circuits, the data transfer speed and capacity of storage equipment has grown significantly. To enable faster transfer of data between storage devices, new sequencing technology has replaced the conventional Small Computer Small Interface (SCSI) and Advanced Technology Attachment (ATA) hard drive parallel connection technologies. These new technologies include Serial Attached SCSI (SAS) and Serial ATA (SATA), which have succeeded and replaced SCSI and ATA, respectively.
Typically, LEDs are employed to display the operational status of connected SAS and SATA devices. For example, it is common to use at least one LED to represent drive activity. It is also common to use additional LEDs to indicate locate and error conditions. To communicate this information along with other data, manufacturers usually use either an SGPIO interface protocol or an I2C interface protocol. In either case, the interface protocol specifies how data is transferred between an initiator unit or device 110 (such as a host bus adapter) and a target unit or device 120 (such as a backplane holding disk drives).
The I2C interface protocol is described in NXP Semiconductor's UM10204 I2C-bus specification and user manual (Rev. 03-19 Jun. 2007), which is publicly available on the Internet and which document is herein incorporated by reference for all purposes. The I2C interface protocol uses two lines of bi-directional open drain serial data (SDA) and serial clock (SCL) for transmitting a control signal and uses a resistor to pull an electrical potential to trigger the signal. The I2C interface protocol allows wide working voltage range, but the typical voltage level is +3.3 V or +5 V. A reference design of the I2C interface protocol uses an address space of 7-bit length but reserves 16 addresses, so one set of buses may be communicated with 112 nodes at most. The common I2C bus has different modes comprising a standard mode (100 Kbit/s) and a low speed mode (10 Kbit/s) in accordance with different transfer speeds.
The SGPIO interface protocol is described in the SFF Committee's SFF-8485 Specification for the Serial GPIO (SGPIO) Bus. Revision 0.7, dated 1 Feb. 2006, of this specification, which is publicly available on the Internet, is hereby incorporated by reference for all purposes. FIG. 1 is a schematic view of pins of an SGPIO in the conventional art. The SGPIO in the conventional art has four signal lines comprising SClock, SLoad, SDataOut, and SDataIn. The first three signal lines transfer signals from an initiator 110 to a target 120. The last signal line transfer signals from the target 120 to the initiator 110. The SClock is configured to define a transfer clock of the SGIPO. The SLoad is synchronized to the clock and is used to indicate the start of a new frame of data to be transferred. The new frame is at least 5 clock cycles after the SLoad, and is triggered on the rising edge of the clock waveform. The SDataOut is the serial data output bit stream, and the SDataIn is the serial data input bit stream. Generally speaking, the SDataIn is not supported by all the SGPIO equipments, so the signal line of the SDataIn is optional.
If a redundant array of independent disk (RAID) supports the SGPIO, the interface protocol exactly comprises an SGPIO signal interface in addition to the data transfer interface, and can realize the data transfer and the control of indicators by a signal line comprising the data and SGPIO. SAS over I2C is managed by a special line of the I2C interface on the RAID card, which may be referred to as out-of-band management. For the SGPIO, this may be referred to as in-band management. Besides the RAID card supports the SGPIO, the disk backplane is required to support the SGPIO.
To provide for either SGPIO or I2C transfer using the same hardware, the conventional art provides a jumper or a method of hardware detection. The jumper setup comprises having a user set a jumper before connecting the target 120 to the initiator 110, so as to select between different interface protocols. Although this setup is low cost, resetting of the jumper is required every time the hardware is replaced. If the user forgets to set the jumper properly, the initiator 110 and the target 120 cannot function normally.
A conventional hardware detection setup, which provides for detection of a signal transferred by the initiator unit 110, requires a correspondence of SGPIO and I2C pins as shown in Table 1 below.
TABLE 1Correspondence Table of Pins of SGPIOand I2C in the Conventional ArtPIN FUNCTIONPIN FUNCTIONSEQUENCE OF PINSOF SGPIOOF I2C0SCLKClock (2W_SCLK)1SLoadDataOutput (2W_SDA)2GroundingGrounding3GroundingGrounding4SDataOutReset5SDataInNIL
In this setup, six signal lines are required for driving the SGPIO and the I2C busses. Although this method can achieve quick detection and switch, it requires additional detection chips. Moreover, the hardware must fit the layout of signal lines of the SGPIO and the I2C. The hardware setup costs significantly more than the jumper setup.